Methods for patterning dielectric material, and methods for aligning semiconductor fabrication molds and semiconductor substrates

ABSTRACT

The invention includes methods of forming patterns in low-k dielectric materials by contact lithography. In a particular application, a mold having a first pattern is pressed into a low-k dielectric material to form a second pattern within the material. The second pattern is substantially complementary to the first pattern. The mold is then removed from the low-k dielectric material. The invention also includes a method of forming a mold; and includes a mold configured to pattern a mass over a semiconductor substrate during contact lithography of the mass.

RELATED PATENT DATA

This patent is a divisional of U.S. patent application Ser. No.10/931,607, filed Aug. 31, 2004, entitled “Semiconductor ProcessingMethods”, which is a continuation of U.S. patent application Ser. No.10/461,811, filed Jun. 12, 2003, entitled “Methods of Forming Patternsfor Semiconductor Constructions”, which is a divisional of U.S. patentapplication Ser. No. 10/099,840, filed Mar. 12, 2002, entitled “Methodsof Forming Patterns and Molds for Semiconductor Constructions”, now U.S.Pat. No. 6,716,542 B2; the entirety of all of which are incorporated byreference herein.

TECHNICAL FIELD

The invention pertains to methods of forming patterns for semiconductorconstructions, and in particular applications pertains methods ofutilizing contact lithography for forming patterns. The invention alsoencompasses molds configured to pattern masses associated withsemiconductor constructions.

BACKGROUND OF THE INVENTION

A prior art semiconductor construction 10 is described with reference toFIG. 1. Construction 10 comprises a substrate 12 having a plurality ofconductive pads 14, 16 and 18 supported thereover. Pads 14, 16 and 18can comprise various conductive materials, including, for example,copper and/or aluminum. Substrate 12 can comprise, for example, amonocrystalline silicon wafer having a plurality of circuitconstructions (not shown), such as memory or logic constructions,supported thereon. To aid in interpretation of the claims that follow,the terms “semiconductive substrate” and “semiconductor substrate” aredefined to mean any construction comprising semiconductive material,including, but not limited to, bulk semiconductive materials such as asemiconductive wafer (either alone or in assemblies comprising othermaterials thereon), and semiconductive material layers (either alone orin assemblies comprising other materials). The term “substrate” refersto any supporting structure, including, but not limited to, thesemiconductive substrates described above.

Pads 14, 16 and 18 correspond to electrical interconnects which join thevarious circuitry (not shown) associated with substrate 12 to electricalcomponents (not shown) external of substrate 12. Substrate 12 can beconsidered an integrated circuit component, and pads 14, 16 and 18 cancorrespond to, for example, bonding pads or so-called Level III wiring.

Pads 14, 16 and 18 can be considered to comprise or define electricalnodes. Presently, efforts are underway to redistribute electricalconnections from bonding pads to other regions of semiconductorcircuitry. The redistribution of the electrical connections can simplifyelectrical connection of integrated circuitry associated with asemiconductor construction to other circuitry which is external of thesemiconductor construction. FIG. 1 illustrates a plurality ofredistribution layers 20, 22, and 24 which are electrically connectedwith bonding pads 14, 16 and 18 respectively.

A dielectric material 26 separates redistribution layers 20, 22 and 24from one another. Dielectric material 26 can comprise, for example, aso-called low-k dielectric material, with the term “low-k” referring toa dielectric material having a dielectric constant below 3.5. Anexemplary low-k dielectric material is CYCLOTENE™, which is availablefrom the Dow Chemical Company™. Redistribution layers 20, 22 and 24 canbe referred to as Level IV wiring, and can comprise, for example, copperand/or aluminum.

An insulative material 28 is formed over redistribution layers 20, 22and 24; and openings are formed through insulative material 28 toredistribution layers 20, 22, and 24. Subsequently, conductive materials30 and 32 are formed within the openings. Conductive materials 30 and 32can comprise, for example, a copper seed layer and sputter-depositedcopper, respectively. After formation of layers 30 and 32, a pair ofunder bump metal layers 34 and 36 are provided, and subsequently solderbumps 38 are formed over the under bump layers and in electricalconnection with redistribution layers 20, 22 and 24 through conductivematerials 30 and 32. Under bump layers 34 and 36 can comprise, forexample, nickel and gold, respectively; and solder bumps 38 cancomprise, for example, tin-based solder. In further processing (notshown) solder bumps 38 can be connected with conductive materialsexternal of construction 10 to electrically interconnect integratedcircuitry associated with structure 10 to such external components.

Numerous difficulties are encountered in forming appropriate openings ininsulative material 26 for redistribution layers 20, 22 and 24; andfurther problems are encountered in forming openings in insulativematerial 28 for conductive materials 30 and 32. It would be desirable todevelop methodology which alleviates or eliminates such problems anddifficulties.

SUMMARY OF THE INVENTION

In one aspect, the invention encompasses methods of forming patterns inlow-k dielectric materials by contact lithography. In a particularapplication a mold having a first pattern is pressed into a low-kdielectric material to form a second pattern within the material. Thesecond pattern is substantially complementary to the first pattern. Themold is then removed from the low-k dielectric material.

In another aspect, the invention encompasses a method of forming a mold.A template is provided which has a complement of a desired mold patternthereover. The template is approximately the size of a semiconductorwafer and the desired mold pattern is a pattern utilized for contactlithography during semiconductor processing. A sheet having holesextending therethrough is provided. A mold material precursor isprovided between the sheet and the template, and is pressed between thesheet and template. The mold material precursor is cured during thepressing to convert the precursor to a mold material having the desiredmold pattern. The mold material penetrates through the openings in thesheet and is joined with the sheet to define a mold comprising the moldmaterial and the sheet. The mold is subsequently removed from thetemplate.

In another aspect, the invention encompasses a mold configured topattern a mass over a semiconductor substrate during contact lithographyof the mass. The mold includes a substantially rigid sheet having holesextending therethrough, and a patterned material joined to the sheet.The patterned material extends through the holes in the sheet, and has apattern therein which is a reverse image of a pattern which is to beformed in the mass during contact lithography.

BRIEF DESCRIPTION OF THE DRAWINGS

Preferred embodiments of the invention are described below withreference to the following accompanying drawings.

FIG. 1 is a diagrammatic, cross-sectional, fragmentary view of a priorart semiconductor wafer construction.

FIG. 2 is a diagrammatic, fragmentary, cross-sectional view of asemiconductor wafer construction at a preliminary processing step of amethod of the present invention.

FIG. 3 is a view of the FIG. 2 wafer construction illustrated juxtaposedwith a mold, in accordance with a processing step subsequent to that ofFIG. 2.

FIG. 4 is a view of the FIG. 2 wafer construction shown at a processingstep subsequent to that of FIG. 2, and shown with the FIG. 3 moldpressed into the FIG. 2 wafer construction.

FIG. 5 is a view of the FIG. 2 wafer construction shown at a processingstep subsequent to that of FIG. 4.

FIG. 6 is a view of the FIG. 2 wafer construction shown at a processingstep subsequent to that of FIG. 5.

FIG. 7 is a view of the FIG. 2 wafer construction shown at a processingstep subsequent to that of FIG. 6.

FIG. 8 is a view of the FIG. 2 wafer construction shown at a processingstep subsequent to that of FIG. 7, and shown juxtaposed with a secondmold.

FIG. 9 is a view of the FIG. 2 wafer construction shown at a processingstep subsequent to that of FIG. 8, and shown with the FIG. 8 moldpressed into an upper surface of the wafer construction.

FIG. 10 is a view of the FIG. 2 wafer construction shown at a processingstep subsequent to that of FIG. 9.

FIG. 11 is a view of the FIG. 2 wafer construction shown a processingstep subsequent to that of FIG. 10.

FIG. 12 is a view of the FIG. 2 wafer construction shown at a processingstep subsequent to that of FIG. 11.

FIG. 13 is a view of an initial step of a method of forming a mold inaccordance with an embodiment of the present invention. Specifically,FIG. 13 illustrates a mold template, and an uncured mold materialjuxtaposed relative to the template.

FIG. 14 illustrates the construction of FIG. 13 at a processing stepsubsequent to that of FIG. 13, and specifically illustrates the moldmaterial of FIG. 13 cured within the FIG. 13 template.

FIG. 15 illustrates a mold at a processing step subsequent to that ofFIG. 14, and specifically illustrates the cured mold material of FIG. 14removed from the FIG. 14 template.

FIG. 16 illustrates a top view of a wafer holding apparatus which can beutilized in methodology of the present invention.

FIG. 17 illustrates a top view of a mold apparatus which can be utilizedin methodology of the present invention.

FIG. 18 illustrates the mold apparatus of FIG. 17 juxtaposed relative tothe wafer holding apparatus of FIG. 16, with the apparatuses of FIGS. 16and 17 shown in cross-sectional view in FIG. 18 along the lines 18-18 ofFIGS. 16 and 17. The mold apparatus is shown in an inverted view in FIG.18 relative to the view in FIG. 17.

FIG. 19 illustrates a top view of another embodiment of a wafer holderwhich can be utilized in accordance with methodology of the presentinvention.

FIG. 20 illustrates a bottom view of a second embodiment mold which canbe utilized in methodology of the present invention.

FIG. 21 illustrates the mold of FIG. 20 juxtaposed relative to the waferholding apparatus of FIG. 19, and shows the FIG. 20 mold and FIG. 19wafer holding apparatus in cross-sectional view. The cross-sections ofFIGS. 21 are along the lines 21-21 in FIGS. 19 and 20.

FIG. 22 illustrates an apparatus which can be utilized for contactlithography in accordance with methodology of the present invention.

FIG. 23 illustrates the FIG. 22 apparatus at a processing stepsubsequent to that of FIG. 22.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIGS. 2-12 illustrate an exemplary method of forming a redistributionlayer and electrical contacts to the redistribution layer in accordancewith methodology of the present invention. In referring to FIGS. 2-12,similar numbering will be utilized as was used above in describing theprior art of FIG. 1.

Referring initially to FIG. 2, a semiconductor construction 100 isillustrated in fragmentary view. Construction 100 comprises a substrate12 having contact pads 14, 16 and 18 supported thereby. A low-kdielectric material 26 is provided over substrate 12. Low-k dielectricmaterial 26 can comprise, for example, CYCLOTENE™. Material 26 can bereferred to as a mass supported by substrate 12. Mass 26 can comprise alow-k polymer, consist of essentially of a low-k polymer, or consist ofa low-k polymer. Mass 26 typically does not comprise, consistessentially of, or consist of photoresist.

Referring next to FIG. 3, apparatus 100 is shown juxtaposed relative toa mold 200. Mold 200 comprises a patterned material 202 and a sheet 204.Sheet 204 can comprise a substantially rigid material such as, forexample, spring steel. In the shown embodiment, sheet 204 has openings206 protruding therethrough, and patterned material 202 extends upwardlythrough the openings. A purpose of openings 206 will be described belowwith reference to exemplary processes for forming mold 200. Patternedmaterial 202 can comprise, for example, a siloxane material, or asilicone rubber material, such as, for example, Dow Corning™ HS II RTV™high strength mold making silicone rubber. Patterned material 202 can bea semi-solid material, such as a rubber or gel; or can be, for example,a thermoplastic material.

Patterned material 202 has a patterned lower surface 210. Patternedsurface 210 defines a first pattern comprising projections 212, 214 and216; and comprising valleys 218 and 220 between the projections. Alubricant or release layer (not shown) can be provided over lowersurface 210 to enhance removal of mold 200 from within mass 26 insubsequent processing described below with reference to FIGS. 4 and 5.

Referring to FIG. 4, mold 200 and construction 100 are pressed togetherto force a portion of patterned material 202 into mass 26. The pressingof mold 200 and construction 100 can be accomplished by moving either ofmold 200 and construction 100 relative to the other of mold 200 andconstruction 100; or by moving both mold 200 and construction 100relative to each other. The pressing effectively comprises pressing mass26 between patterned material 200 and substrate 12. The pressing forms asecond pattern within mass 26 which is substantially complementary tothe first pattern defined by lower surface 210 of patterned material202. The second pattern is referred to as being “substantially”complementary to indicate that the second pattern has a general shapecorresponding to the compliment of the first pattern, but can havevariations introduced due to, for example, imperfections in theuniformity of distribution of mass 26 about the interface of patternedmaterial 202 and mass 26. Such imperfections can be caused by, forexample, small gas bubbles.

Referring to FIG. 5, mold 200 (FIG. 4) is removed from semiconductorconstruction 100 to leave the mass 26 patterned into the second pattern.The shown second pattern has openings 230, 232 and 234 extending throughmass 26. Contact pads 14, 16 and 18 are exposed within openings 230, 232and 234, respectively. It is noted that various chemical and/or plasmacleaning steps can be introduced to insure that conductive materials 14,16 and 18 are well exposed within the openings 230, 232 and 234.

The patterning of mass 26 with mold 200 (FIGS. 3 and 4) can be referredto as contact lithography to indicate that such patterning occurredthrough compression of mass 26 with a mold, as opposed to other forms oflithography wherein patterning occurs via other mechanisms.

Referring to FIG. 6, a conductive material 236 is formed across thepatterned mass 26. Conductive material 236 can comprise, for example,one or more metals, such as, for example, metals selected from the groupconsisting of copper, aluminum, tungsten and titanium. Additionally, anetch-stop layer (not shown) can be provided over mass 26 prior toprovision of conductive material 236. In the shown embodiment, thesecond pattern formed within mass 26 comprises both shallow trenches(labeled 240) and deep openings (labeled 238) which extend to pads 14,16 and 18. The conductive material 236 is formed within the shallowtrenches and deep openings.

Referring to FIG. 7, conductive material 236 and mass 26 are togethersubjected to chemical-mechanical polishing. Such patterns conductivematerial 236 into redistribution layers 20, 22 and 24. Accordingly,redistribution layers are formed within the trenches and openings thathad been created in mass 26 by contact lithography. It is noted thatconductive material 236 can comprise an entirety of a redistributionlayer, or can comprise only a portion of the redistribution layer. Ifmaterial 236 is only a portion of a redistribution layer, other portionsof the redistribution layer can be formed with techniques other thancontact lithography. An advantage of utilizing contact lithography toform at least a portion of a redistribution layer (or other patternedsemiconductor component) is that contact lithography can be faster andcheaper than other patterning methods, such as, for example,photolithographic methods.

Referring to FIG. 8, construction 100 is illustrated juxtaposed relativeto a second mold 300. Construction 100 is shown at a processing stepsubsequent to that of FIG. 7, and specifically is shown with aninsulative mass 28 formed over redistribution layers 20, 22 and 24, aswell as over insulative mass 26. Mass 28 can comprise materialsidentical to those discussed previously regarding mass 26, such as, forexample, CYCLOTENE™.

Mold 300 comprises a construction similar to that discussed previouslyrelative to mold 200 (FIG. 3), and specifically comprises a patternedmaterial 302 and a sheet 304. Material 302 and sheet 304 can beidentical in composition to the patterned material 202 and sheet 204described previously with reference to mold 200. Mold 300 comprises asurface 310 of patterned material 302 which defines a third patterncomprising projections 312 and valleys 314 between the projections. Arelease layer or lubricant (not shown) can be provided over surface 310.

Referring to FIG. 9, mold 300 is pressed into mass 28 to pattern mass 28into a fourth pattern which is substantially complementary to the thirdpattern defined by surface 310.

Referring to FIG. 10, mold 300 (FIG. 9) is removed to leave mass 28patterned into the fourth pattern. Such fourth pattern comprisesopenings 310, 312 and 314 extending to redistribution layers 20, 22 and24, respectively.

Referring to FIG. 11, conductive materials 30 and 32 are formed acrossmass 28 and within openings 310, 312 and 314.

Referring to FIG. 12, materials 30 and 32 are planarized by, forexample, chemical-mechanical polishing and/or appropriate etching toremove the materials from over an upper surface of mass 28 while leavingthe materials within openings 310, 312 and 314. Subsequent processingcan be conducted to form the under bump materials 34 and 36, and solderbumps 38, described previously with reference to the prior artconstruction of FIG. 1.

The embodiment described with reference to FIGS. 2-12 is an exemplaryembodiment of the present invention, and it is to be understood that theinvention encompasses other embodiments in addition to that shown. Forinstance, although a single mold is shown forming the shallow trenchesand deep openings in first masking material 26 (specifically, the mold200 of FIGS. 3 and 4), it is to be understood that two separate moldscould be utilized; with one mold forming the deep openings and anothermold forming the shallow trenches.

A method for forming a mold suitable for utilization in methodology ofthe present invention is described with reference to FIGS. 13-15.Referring initially to FIG. 13, a template 400 is provided. Template 400comprises an upper surface 402 which is patterned into a complement of adesired mold pattern. In other words, surface 402 comprises a reverseimage of a desired mold pattern. Template 400 is preferablyapproximately the size of a semiconductor wafer, and in particularapplications can correspond to a semiconductor wafer having an uppersurface patterned by conventional photolithography techniques, or byother techniques, such as, for example, ion beam or electron beamtechnologies. Template 400 is referred to as being “approximately” thesize of a semiconductor wafer to indicate that template 400 ispreferably at least large enough to encompass all of the patternedregion of a semiconductor wafer which is ultimately to be formed bycontact lithography, but can have variations in size relative to otherportions of the semiconductor wafer without substantially impactingperformance aspects of molds formed utilizing the template.

Upper surface 402 can be coated with a suitable lubricant or releaselayer (not shown), such as, for example, silicone.

A mold construction 410 is illustrated provided above the template 400at a preliminary step in formation of a patterned mold from theconstruction. Mold construction 410 comprises a sheet 412 having holes414 extending therein. Sheet 412 can comprise a substantially rigidmaterial, such as, for example, a metallic material. Sheet 412preferably comprises some flexibility, however, and accordinglypreferably comprises a substantially rigid material which also hasflexibility, such as, for example, spring steel. In particularembodiments sheet 412 is about 0.010 inch thick, and is blue temperedspring steel. Sheet 412 can be a rectangle with dimensions of about 24inches in length by about 12⅜ inches in width. Holes 414 can be, forexample, an array of about 0.1 inch diameter holes with acenter-to-center spacing of about 0.3 inch. The holes 414 can be formedby, for example, laser etching.

A mold material precursor 416 is provided over a surface of sheet 412.Precursor 416 can comprise, for example, a mixture of the two liquidparts of Dow Corning™ HS II RTV™ High Strength Mold Making SiliconeRubber. Precursor 416 is shown in a liquid state at the processing stepof FIG. 13. Precursor 416 is preferably applied onto sheet 412 by amethod which forms a flat, uniform coating. Exemplary methods includespin coating, and meniscus spraying with reflow.

Referring to FIG. 14, mold construction 410 is pressed into template400, and subsequently precursor 416 is cured to convert the precursor toa patterned mold material. The mold material is preferably smoothlymated with the template to avoid wrinkles or distortion, and pressure isapplied while heating the mold material. The cured mold material has adesired mold pattern substantially complementary to the pattern definedby upper surface 402 of template 400. The cured mold material 416 can bea semi-solid material, with the term “semi-solid” indicating that thematerial has a gelatinous or rubbery texture. It is to be understood,however, that other types of mold material can be utilized inembodiments of the present invention besides patterned materials,including, for example, materials which are non-rubbery solids,including various thermoplastic materials. The thermoplastic materialscan be compressed between sheet 412 and template 400, while being heatedto an appropriate temperature to melt and flow into the pattern oftemplate 400 and to flow through orifices 414. The thermoplasticmaterial can then be cooled to cure the thermoplastic materials into adesired patterned shape.

The orifices 414 in sheet 412 can allow gases to escape during curing ofmaterial 416. In exemplary embodiments, material 416 will cure to form apatterned which is permeable to gases generated during the curing ofmaterial 416. Accordingly, the generated gases can penetrate throughcured portions of material 416 and subsequently out of orifices 414 toavoid formation of bubbles of the generated gases either within material416 or at interfaces of material 416 and template 400.

The curing of material 416 can be accomplished while utilizing hotisostatic pressing of mold construction 410 relative to template 400.The pressing is referred to as “hot” pressing to indicate that it occursabove room temperature, and is referred to as “isostatic” to indicatethat a pressure remains substantially constant during the curing of themold material 416. In particular applications, a vacuum can be drawnrelative to a shown upper surface of sheet 412 to enhance removal ofgases generated during curing of material 416. More specifically, avacuum can be initially applied, and then chamber 410 can be pressuredby atmosphere to obtain an overpressure of several atmospheres which canbe maintained to within ±1 atmosphere during curing of mold material416.

In a particular aspect of the invention, construction 410 is subjectedto evacuation from above and below material 416. The material 416 canthen outgas and conform to mold 402 without trapping air. After thematerial 416 has been allowed to spread and cover an entire portion ofthe mold 402 that is desired to be covered by material 416, the pressureabove construction 410 is raised to at least one atmosphere (14pounds/square inch) until any voids at the material 416/mold 402interface are removed. The pressure can be raised higher to compress thestill-liquid material 416 into small holes, lines and shapes where theviscosity of material 416 may otherwise preclude filling through surfacetension/surface energy effects alone.

FIG. 15 illustrates mold construction 410 removed from template 400(FIG. 14) after curing of mold material 416. Cured material 416 has anillustrated lower surface 420 which defines a pattern substantiallycomplementary to the upper surface 402 (FIG. 14) of template 400. Thecured mold material 416 is illustrated penetrating through openings 414and extending across an illustrated upper surface of sheet 412.Accordingly, sheet 412 is grasped within cured mold material 416 so thatsheet 412 and material 416 effectively together form a robust singlemold unit. The robustness (i.e., durability) of the mold unit can befurther enhanced if material 416 chemically interacts with sheet 412 tobond with the material of sheet 412.

A difficulty which can be encountered in utilization of contactlithography occurs in aligning a mold pattern relative to either atemplate utilized to generate the pattern, or a semiconductor wafersubstrate upon which the pattern is to be imprinted. Exemplarymethodology for aligning a mold relative to a substrate is describedwith reference to FIGS. 16-21.

Referring initially to FIG. 16, a semiconductor substrate holder 500 isillustrated. Holder 500 comprises a receptacle 502 configured forreceiving a semiconductor wafer, and in the shown embodiment a wafer 503is retained within the receptacle. Receptacle 502 comprises a generallycircular shape with a flat region 504, and accordingly in the shownembodiment is configured to mate tightly with semiconductor wafers whichare themselves circular about a majority of the periphery and comprise aflat portion. It is to be understood that receptacle 502 can compriseother shapes, depending on the shapes of wafers which are to be heldwithin holder 500. Preferably, receptacle 502 will be configured totightly retain semiconductor wafers in a reproducible orientationrelative to holder 500. It is noted that receptacle 502 can be replacedwith other retaining means configured to retain semiconductor wafers inparticular, reproducible orientations relative to holder 500.

Substrate holder 500 is shown comprising a rectangular configuration,but it is to be understood that holder 500 can comprise other shapes inother embodiments of the invention which are not shown.

A plurality of alignment regions 506, 508, 510 and 512 are shown withinsubstrate holder 500. Although four alignment regions are shown, it isto be understood that the invention encompasses other embodimentswherein more than four alignment regions, or less than four alignmentregions, are utilized. Alignment regions 506, 508, 510 and 512 comprisealignment articles which ultimately are utilized for aligning substrateholder 500 relative to a mold. Such alignment articles can correspondto, for example, markings utilized for optical alignment, or componentsof a mechanical alignment system. An exemplary mechanical alignmentsystem is a system wherein pins are provided as an alignment articleassociated with either substrate holder 500 or with a mold, receptaclesare provided with the other of substrate 500 and the mold, andsubsequently the pins are inserted into the receptacles to align thesubstrate holder with the mold.

Referring to FIG. 17, a mold 520 is illustrated. Mold 520 comprises asubstantially rigid sheet 522 and a patterned material 524 joined tosheet 522. Material 524 can be identical to the material 416 describedwith reference to FIG. 15, and sheet 522 can be identical to the sheet412 described with reference to FIG. 15. A plurality of alignmentregions 526, 528, 530 and 532 are defined relative to mold 520.Alignment regions 526, 528, 530 and 532 comprise alignment articleswhich ultimately are utilized for aligning mold 520 with the substrateholder 500 of FIG. 16. Alignment articles 526, 528, 530 and 532 cancomprise optical alignment articles, such as, for example, transparentwindows having markings thereon which are ultimately aligned withmarkings corresponding to alignment articles on substrate holder 500.Alternatively, the alignment articles associated with mold 520 cancomprise mechanical alignment articles, such as, for example, eitherpins or receptacle configured to align With mechanical alignmentarticles associated with substrate holder 500.

FIG. 18 shows a cross-sectional view of substrate holder 500 juxtaposedrelative to mold 520, and illustrates an embodiment wherein alignmentarticles 508 and 510 correspond to pins, and alignment articles 528 and530 correspond to receptacles. Accordingly, mold 520 is aligned relativeto substrate holder 500 by inserting pins 508 and 510 into receptacles528 and 530. After such alignment, mold 520 can be pressed relative tosubstrate holder 500 to force material 524 into a layer (not shown)associated with the semiconductor wafer 503 retained in holder 500 toimprint a pattern from material 524 into the layer. Further, substrateholder 500 can be utilized during formation of a mold by placing atemplate within receiving orifice 502, and subsequently aligning a mold520 relative to substrate holder 500 to press uncured mold materialprecursor against the template and retain the precursor in an alignedorientation relative to the template during curing of the precursor.

Although the alignment articles of FIG. 18 are shown as particular pinsand receptacles, it is to be understood that the alignment articles canhave other geometric configurations. For instance, it can be desired touse shapes different than the shown pins to reduce alignment tolerances.In some applications, it may be desired that the pins be as large as isphysically possible relative to the receptacles to ensure a tight fitand substantially minimum tolerances.

FIGS. 19-21 illustrate an alternative method of aligning a substraterelative to a mold. Referring initially to FIG. 19, a substrate holder550 is illustrated. Substrate holder 550 comprises a receptacle 552configured for retaining a semiconductor substrate, and a substrate 554shown within the receptacle. Substrate 554 comprises an alignmentpattern 556 associated therewith. Alignment pattern 556 can comprise,for example, an optical alignment pattern, such as, for example, adiffraction grating.

FIG. 20 illustrates a mold 570 comprising a sheet 572. Mold 570 alsocomprises a patterned material 580 (FIG. 21) analogous to the material524 described with reference to FIG. 17. However, the view of FIG. 20 isfrom an opposing side relative to the view of FIG. 17, and accordingly,the patterned mold material is on a backside surface of mold 570 whichis not shown in the view of FIG. 20. Mold 570 comprises a window 574extending through sheet 572. In the shown embodiment, the patterned moldmaterial 580 (FIG. 21) is transparent, and comprises an opticalalignment marking 576 associated therewith. Alignment pattern 576 cancomprise, for example, a diffraction grating.

FIG. 21 illustrates substrate holder 550 and mold 570 in cross-sectionalview and juxtaposed relative to one another. Alignment pattern 556 canbe viewed through window 574 and transparent mold material 580, andaccordingly optical alignment patterns 556 and 576 can be alignedrelative to one another to enable alignment of mold 570 relative to thesemiconductor substrate 554.

In particular embodiments, the mechanical alignment methodology of FIG.18 can be used in conjunction with the optical alignment of FIG. 21. Insuch embodiments pin alignment can be used to get a wafer holder andmold close to a final alignment (i.e. can be utilized for coarsealignment adjustment), and subsequently optical alignment can beutilized to improve the alignment of the wafer substrate and mold (i.e.can be utilized for fine alignment adjustment).

Contact lithographic methodology of the present invention can compriseany suitable method of compression of a mold and a wafer substrate.FIGS. 22 and 23 illustrate exemplary methodology which can be utilizedfor pressing a mold against a semiconductor substrate, and subsequentlyreleasing the mold form the semiconductor substrate. Specifically, FIG.22 illustrates an apparatus 600 comprising a substrate holder 602 havingorifices 604 formed therethrough, and clamps 606 associated therewith. Asemiconductor wafer substrate 612 is retained within holder 602. Clamps606 comprises portions 608 and 610. A mold 620 comprises a sheet 622 anda patterned mold material 624, with the sheet 622 retained within clamps606. A gasket (not shown) can be provided between the clamps and thesheet 622, with a suitable gasket material being neoprene. In otherembodiments (not shown), clamps 606 can be eliminated and replaced witha neoprene gasket material upon which sheet 622 is rested. An entiretyof the assembly of FIG. 23 can be less than or equal to 1/8 inch thick.

In operation a vacuum (illustrated by downwardly extending arrows 630)is drawn through orifices 604 to pull patterned mold material 624 onto asurface of substrate 612. The vacuum can be pulled to apply a uniformpressure of about 14 pounds/in² between the mold and the substrate.

Referring to FIG. 23, mold 620 is released from substrate 612 by flowingpressure through orifices 604 (illustrated by upwardly extending arrows640), which causes a central portion of mold 620 to lift from substrate612. It is noted that removal of a patterned material from over asemiconductor substrate can be problematic, in that the patternedmaterial can stick to the semiconductor substrate. Methodology of thepresent invention can form a small break between the patterned materialand the semiconductor substrate at an edge as pressure is applied, andthen propagate the break across a central region of the patternedmaterial and substrate to release the patterned material from thesubstrate.

An advantage of utilizing a flexible material for sheet 622 is evidentin FIGS. 22 and 23. Specifically, such flexible material can enablesheet 622 to flex during the pull of a vacuum (illustrated in FIG. 22)so that patterning material 624 is pulled into a surface of substrate612; and further a flexible sheet 622 can enable the mold 624 to flexduring introduction of pressure (illustrated in FIG. 23) so that thepattern material 624 is lifted from substrate 612 to simplify removal ofthe substrate.

Although the contact lithography of the present invention is describedabove with reference to an exemplary process of forming a pattern in adielectric material during fabrication of a redistribution layer, it isto be understood that the invention encompasses other utilizations ofcontact lithography in addition to the specifically describedembodiment. For instance, the invention encompasses other applicationsof contact lithography to semiconductor fabrication processes.

In compliance with the statute, the invention has been described inlanguage more or less specific as to structural and methodical features.It is to be understood, however, that the invention is not limited tothe specific features shown and described, since the means hereindisclosed comprise preferred forms of putting the invention into effect.The invention is, therefore, claimed in any of its forms ormodifications within the proper scope of the appended claimsappropriately interpreted in accordance with the doctrine ofequivalents.

1-44. (canceled)
 45. A method for aligning a semiconductor fabricationmold and a semiconductor substrate comprising: providing a semiconductorfabrication mold having a first alignment article associated therewith;providing a semiconductor substrate having a second alignment articleassociated therewith, the semiconductor substrate having anon-photoresist material thereover; and aligning the first alignmentarticle of the semiconductor fabrication mold relative to the secondalignment article of the semiconductor substrate, the non-photoresistmaterial being between the mold and the substrate during the aligning.46. The method of claim 45 wherein the first article comprises a pin andthe second article comprises a receptacle, the aligning comprisingmating the pin with the receptacle.
 47. The method of claim 45 furthercomprising utilizing the mold to form a pattern in the material.
 48. Themethod of claim 45 further comprising, after aligning the first andsecond alignment articles with one another, pressing the mold relativeto the material to form a reverse image of at least a portion of thepattern of the mold within the material.
 49. The method of claim 45wherein one of the first and second alignment articles is a pin and theother of the first and second alignment articles is a receptacle; andwherein the aligning comprises mating the pin within the receptacle. 50.The method of claim 45 wherein: the second alignment article is a firstoptical pattern, the first optical pattern being supported by thesemiconductor substrate; the mold comprises a substantially transparentportion and a second optical pattern within the substantiallytransparent portion; and the aligning comprises aligning the first andsecond optical patterns relative to one another.
 51. A method ofpatterning a dielectric material,comprising: providing a substratehaving a dielectric material thereover, the substrate having an opticalalignment pattern supported thereby; providing a mold having a firsttopographical pattern, the mold comprising a region through which theoptical alignment pattern can be viewed during an alignment of the moldand substrate relative to one another; aligning the mold and substraterelative to one another; after the aligning, utilizing the mold to pressa second topographical pattern in the dielectric material, the secondtopographical pattern being substantially complementary to the firsttopographical pattern; and after utilizing the mold to press the secondtopographical pattern, removing the mold from over the dielectricmaterial.
 52. The method of claim 51 wherein the dielectric materialcomprises a low-k dielectric material.
 53. The method of claim 51wherein the mold comprises a siloxane.
 54. The method of claim 51wherein the second topographical pattern comprises shallow trencheswithin the dielectric material and deep openings through the dielectricmaterial.